ESD protection circuit for 8.5Gbps I/Os in 90nm CMOS technology.

Hossein Sarbishaei Manoj Sachdev

Published in: CICC (2009)

Keyphrases

cmos technology
low power
power consumption
low voltage
spl times
parallel processing
image sensor
power dissipation
low cost
high speed
block size
silicon on insulator
mixed signal
real time
external memory
main memory
query processing