409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS.

Sheng Sun Yi Han Xinyu Guo Kian Haur Chong Larry McMurchie Carl Sechen

Published in: ISVLSI (2005)

Keyphrases

prediction accuracy
first order logic
prediction error
logic circuits
prediction algorithm
prediction model
multi valued
classical logic
predicate logic
logic programming
neural network
search algorithm
artificial neural networks
transitive closure
asynchronous circuits