Automatic Optimization Techniques for Formal Verification of Asynchronous Circuits.
Menouer BoubekeurMichel P. SchellekensPublished in: ICECS (2007)
Keyphrases
- formal verification
- asynchronous circuits
- model checking
- model checker
- temporal logic
- process algebra
- automated verification
- delay insensitive
- symbolic model checking
- bounded model checking
- formal specification
- expert systems
- semi automatic
- concurrent systems
- fully automatic
- program slicing
- functional verification
- optimization problems