Coarse-grain dynamically reconfigurable coprocessor for image processing in SOPC.
Almudena LindosoLuis EntrenaJuan IzquierdoJudith Liu-JimenezPublished in: FPL (2008)
Keyphrases
- efficient implementation
- coarse grain
- reconfigurable hardware
- image processing
- fine grain
- hardware implementation
- low cost
- image processing algorithms
- hardware software
- field programmable gate array
- evolvable hardware
- signal processing
- hardware and software
- distributed computing
- massively parallel
- fine grained
- design methodology
- processing elements
- image segmentation
- computer vision