A first-step towards an architecture tuning methodology for low power.

Greg Stitt Frank Vahid Tony Givargis Roman L. Lysecky

Published in: CASES (2000)

Keyphrases

low power
power consumption
low cost
high speed
single chip
high power
logic circuits
vlsi architecture
vlsi circuits
digital signal processing
low power consumption
wireless transmission
cmos technology
delay insensitive
gate array
power dissipation
mixed signal
energy dissipation
signal processing
signal processor