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Design of a Sparsity-Aware Reconfigurable Deep Learning Accelerator Supporting Various Types of Operations.
Shen-Fu Hsiao
Kun-Chih Chen
Chih-Chien Lin
Hsuan-Jui Chang
Bo-Ching Tsai
Published in:
IEEE J. Emerg. Sel. Topics Circuits Syst. (2020)
Keyphrases
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deep learning
machine learning
high dimensional
probabilistic model
field programmable gate array
deep architectures