Reducing Power Dissipation, Delay, and Area in Logic Circuits by Narrowing Transistors.
Stephen H. UngerPublished in: IEEE Des. Test Comput. (2003)
Keyphrases
- power dissipation
- logic circuits
- power consumption
- low power
- cmos technology
- power reduction
- flip flops
- high speed
- low cost
- tunnel diode
- functional decomposition
- digital signal processing
- power saving
- nm technology
- equivalent circuit
- pattern recognition
- image processing
- image sensor
- design methodology
- data flow
- fault tolerant
- image segmentation