Architectural design of a bi-level image high speed codec.

Hitoshi Horie Tohru Ozaki Hideyuki Shirai Yasuo Iizuka

Published in: IEEE Trans. Circuits Syst. Video Technol. (1994)

Keyphrases

architectural design
bi level
high speed
image data
input image
image content
image features
single image
image classification
image segmentation
image retrieval
image analysis
segmentation method
image representation
multiscale
software architecture
test images
image regions
design decisions
gray scale
high resolution
case study
real time
pricing model
feature points
image processing
e learning