Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions.
Heng LinPiyo ChenYuan-Shin HwangJenq-Kuen LeePublished in: ICPP Workshops (2019)
Keyphrases
- instruction set architecture
- instruction set
- parallel architectures
- single instruction multiple data
- application specific
- general purpose
- programming language
- massively parallel
- floating point
- highly optimized
- optimization strategies
- floating point unit
- array processor
- connected component labeling
- highly parallel
- computer programs
- parallel implementation
- embedded systems
- parallel algorithm
- software systems
- high speed
- low power consumption
- real time
- distributed memory machines