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A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability.
Chenyue Ma
Bo Li
Lining Zhang
Jin He
Xing Zhang
Xinnan Lin
Mansun Chan
Published in:
ISQED (2009)
Keyphrases
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unified model
probability distribution
dynamic environments
theoretical analysis
statistical model
mathematical model
wide range
formal model
probabilistic model
neural network model
short circuit
neural network
computational model
management system
cost function
objective function
high level