A hardware-efficient FIR architecture with input-data and tap folding.
Li-Hsun ChenOscal T.-C. ChenPublished in: ISCAS (1) (2005)
Keyphrases
- input data
- real time
- low cost
- hardware design
- management system
- computationally efficient
- hardware and software
- data sets
- vlsi architecture
- image data
- computer systems
- parallel architectures
- vlsi implementation
- content addressable
- dedicated hardware
- software implementation
- filter design
- computing systems
- hardware implementation
- software architecture
- data points
- training data
- decision trees
- feature selection