A high performance hardware architecture for multi-frame hierarchical motion estimation.
Huong HoRobert KlepkoNam NinhDemin WangPublished in: IEEE Trans. Consumer Electron. (2011)
Keyphrases
- multi frame
- motion estimation
- hardware architecture
- hardware implementation
- image sequences
- optical flow
- super resolution
- video coding
- motion compensation
- multiple frames
- video sequences
- motion vectors
- hardware architectures
- motion model
- motion field
- computational complexity
- single frame
- point correspondences
- motion segmentation
- associative memory
- video compression
- computer vision
- block matching motion estimation
- field programmable gate array
- low cost
- viewpoint
- optic flow
- computationally efficient
- high quality