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A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nm.

Benjamin P. HershbergNereo MarkulicJorge LagosEwout MartensDavide DermitJan Craninckx
Published in: VLSI Circuits (2020)
Keyphrases
  • monitoring system
  • real time
  • dynamic environments
  • low cost
  • single chip
  • analog vlsi
  • video sequences
  • high speed
  • low power
  • linear array