Towards Gb/s turbo decoding of product code onto an FPGA device.
Camille LerouxChristophe JégoPatrick AddeMichel JézéquelPublished in: ISCAS (2007)
Keyphrases
- fpga device
- turbo codes
- hardware implementation
- reed solomon
- error correcting
- life cycle
- error control
- error correction
- soft decision
- source code
- distributed video coding
- ldpc codes
- field programmable gate array
- decoding algorithm
- decision feedback
- real time
- neural network
- error detection
- high speed
- machine learning
- open source
- pattern recognition
- computer vision
- low density parity check