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Unified and Scalable Digit-Serial Systolic Array for Multiplication and Division Over GF (2m).
Atef Ibrahim
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
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systolic array
reconfigurable architecture
data flow
parallel architecture
highly scalable
memory efficient
database
databases
neural network
computer vision
recognition rate
multi view
unified model