Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches.
Changkyu KimDoug BurgerStephen W. KecklerPublished in: IEEE Micro (2003)
Keyphrases
- memory access
- memory hierarchy
- memory management
- caching scheme
- data access
- cache misses
- main memory
- cache hit ratio
- access latency
- multithreading
- operating system
- prefetching
- processor core
- power dissipation
- shared memory
- instruction set
- memory subsystem
- memory bandwidth
- multi core processors
- processing units
- database management systems
- low cost
- clock frequency
- phase locked loop
- access patterns
- hardware implementation
- data management
- functional units
- external memory
- high density
- analog vlsi
- high speed
- query processing
- vlsi implementation
- single chip
- circuit design
- data structure