A hexagonal shaped processor and interconnect topology for tightly-tiled many-core architecture.
Zhibin XiaoBevan M. BaasPublished in: VLSI-SoC (2012)
Keyphrases
- high speed
- parallel architecture
- multi processor
- real time
- instruction set
- management system
- parallel processing
- software architecture
- computation intensive
- network architecture
- core components
- single processor
- systolic array
- single chip
- parallel processors
- processing elements
- multithreading
- multi core processors
- fault tolerant
- interconnection networks
- level parallelism