Sign in
Evaluating on-chip interconnects for low operating frequency silicon neuron arrays.
Andrew Cassidy
Thomas S. Murray
Andreas G. Andreou
Julius Georgiou
Published in:
ISCAS (2011)
Keyphrases
</>
cmos technology
high density
low cost
high speed
low power
input output
power dissipation
neural network
lower cost
real time
flip flops
focal plane
low power consumption
power consumption
analog vlsi
silicon on insulator
single chip
fiber optic
clock frequency
parallel processing
high resolution