Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures.
Surin KittitornkunYu Hen HuPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2003)
Keyphrases
- digital signal processing
- signal processing
- learning algorithm
- computationally efficient
- software implementation
- data structure
- real life
- orders of magnitude
- optimization problems
- systolic array
- real time image processing
- image processing algorithms
- low power
- computational efficiency
- infrared
- data mining
- low cost
- computational cost
- significant improvement
- computational complexity
- bayesian networks
- image processing
- machine learning