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Reliability-Enhanced High-Level Synthesis using Memory Profiling and Fault Injection.

Christian FibichMartin HorauerRoman Obermaisser
Published in: ISIE (2019)
Keyphrases
  • fault injection
  • high level synthesis
  • java card
  • parallel architecture
  • smart card
  • design space exploration
  • fault model
  • case study
  • cost effective
  • static analysis