Adding Debug Enhancements to Assertion Checkers for Hardware Emulation and Silicon Debug.

Marc Boule Jean-Samuel Chenard Zeljko Zilic

Published in: ICCD (2006)

Keyphrases

low cost
parallel programming
neural network
general purpose
computer systems
hardware and software
high speed
knowledge acquisition
parallel execution
novice programmers
data sets
image processing
hardware implementation
massively parallel
high end
memory management