The LUT-SR Family of Uniform Random Number Generators for FPGA Architectures.
David B. ThomasWayne LukPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2013)
Keyphrases
- random number generators
- random number
- random numbers
- special case
- super resolution
- hardware implementation
- high speed
- real time
- field programmable gate array
- low cost
- pseudo random number generators
- lookup table
- inverse halftoning
- digital signal processors
- pseudorandom
- uniformly distributed
- hardware architecture
- low resolution
- signal processing
- high resolution
- training data