A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA.
Alireza HodjatIngrid VerbauwhedePublished in: FCCM (2004)
Keyphrases
- parallel architecture
- systolic array
- high speed
- single chip
- data flow
- hardware implementation
- digital signal
- parallel processing
- xilinx virtex
- gate array
- shared memory
- fpga device
- field programmable gate array
- general purpose processors
- hardware architecture
- low power
- low cost
- real time
- distributed memory
- computer architecture
- parallel implementation
- software implementation
- fpga implementation
- dedicated hardware
- fpga technology