A 62.5 ns holographic reconfiguration of an optically differential reconfigurable gate array.
Mao NakajimaMinoru WatanabePublished in: FPT (2007)
Keyphrases
- gate array
- low power
- low cost
- dynamic reconfiguration
- logic circuits
- data storage
- reconfigurable architecture
- network simulator
- general purpose
- manufacturing systems
- power consumption
- software systems
- wireless sensor networks
- high capacity
- digital signal
- hardware implementation
- application specific
- end to end delay
- signal processing
- high speed