Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED).
David GarrettChia-Lin YangPublished in: IEEE Des. Test (2017)
Keyphrases
- low power
- international symposium
- single chip
- power consumption
- high speed
- vlsi architecture
- low power consumption
- digital signal processing
- low cost
- logic circuits
- gate array
- design process
- power dissipation
- mixed signal
- vlsi circuits
- cmos technology
- electrical engineering
- computational intelligence
- high power
- design methodology
- operating system
- data mining
- revised papers
- neural network
- power reduction
- nm technology
- real time