Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits.

Curtis A. Nelson Chris J. Myers Tomohiro Yoneda

Published in: ICCAD (2003)

Keyphrases

asynchronous circuits
process algebra
delay insensitive
petri net
knowledge base
computationally efficient
levels of abstraction
real time
decision making
computationally expensive
formal methods