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Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper.

Paolo MeloniSimone SecchiLuigi Raffo
Published in: VLSI-SoC (2010)
Keyphrases
  • network on chip
  • hardware implementation
  • interconnection networks
  • low cost
  • field programmable gate array
  • smart camera
  • general purpose
  • routing algorithm
  • network simulator
  • multi processor
  • multistage
  • fault tolerant