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Clock-less 8-bit SAR-ADC with delay-line based digital control circuit.
Mattia Borgarino
L. Giacomini
G. Luppi
F. Digiaro
Jean-Baptiste Begueret
N. Verrascina
Published in:
Microelectron. J. (2019)
Keyphrases
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high speed
sigma delta
circuit design
analog to digital converter
data acquisition
duty cycle
control system
power consumption
control strategy
sar images
synthetic aperture radar
real time
neural network
metadata
image reconstruction
delay insensitive