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A novel low gate-count serializer topology with Multiplexer-Flip-Flops.

Wei-Yu TsaiChing-Te ChiuJen-Ming WuShawn S. H. HsuYarsun HsuYing-Fang Tsao
Published in: ISCAS (2012)
Keyphrases
  • multiple input
  • flip flops
  • cmos technology
  • high speed
  • neural network
  • relational databases
  • image analysis
  • control system
  • master slave
  • allocation scheme