Power consumption reduction in built-in self-test circuits.
Mohsen AskarzadehMajid HaghparastSam JabbehdariPublished in: J. Ambient Intell. Humaniz. Comput. (2023)
Keyphrases
- power consumption
- power reduction
- built in self test
- low power
- power saving
- power dissipation
- integrated circuit
- power management
- energy efficiency
- clock gating
- energy management
- cmos technology
- energy saving
- battery powered
- battery life
- data center
- low cost
- response time
- ad hoc networks
- power control
- low power consumption
- peer to peer
- real time