Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap.
B. V. V. SatyanarayanaMatta Durga PrakashPublished in: Microprocess. Microsystems (2020)
Keyphrases
- low power
- cmos technology
- power consumption
- high speed
- ultra low power
- logic circuits
- power dissipation
- vlsi architecture
- low cost
- power reduction
- single chip
- low voltage
- gate array
- mixed signal
- low power consumption
- circuit design
- digital signal processing
- high power
- wireless transmission
- image sensor
- vlsi circuits
- parallel processing
- power saving
- low complexity
- signal processor
- nm technology
- micron cmos
- efficient implementation
- delay insensitive
- design considerations