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B. V. V. Satyanarayana
ORCID
Publication Activity (10 Years)
Years Active: 2020-2020
Publications (10 Years): 1
Top Topics
Design Considerations
Delay Insensitive
Micron Cmos
Low Power
Top Venues
Microprocess. Microsystems
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Publications
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B. V. V. Satyanarayana
,
Matta Durga Prakash
Device and Circuit Level Design, Characterization and Implementation of Low Power 7T SRAM Cell using Heterojunction Tunneling Transistors with Oxide Overlap.
Microprocess. Microsystems
77 (2020)