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Circuit optimization for leakage power reduction using multi-threshold voltages for high performance microprocessors.
Jeegar Tilak Shah
Marius Evers
Jeff Trull
Alper Halbutogullari
Published in:
ISPD (2007)
Keyphrases
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power reduction
power consumption
low power
power saving
power dissipation
single chip
low cost
high speed
computer architecture
transmission line
real time
fine grained
cost effective
energy efficiency