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Gate-Level Register Relocation in Generalized Synchronous Framework for Clock Period Minimization.
Yukihide Kohira
Atsushi Takahashi
Published in:
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2007)
Keyphrases
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high speed
lightweight
main contribution
databases
conceptual framework
data sets
higher level
framework enables
real time
computer vision
decision making
multiscale
probabilistic model
power consumption