Simultaneous SAT-Based Model Checking of Safety Properties.
Zurab KhasidashviliAlexander NadelAmit PaltiZiyad HannaPublished in: Haifa Verification Conference (2005)
Keyphrases
- epistemic logic
- model checking
- bounded model checking
- temporal properties
- temporal logic
- model checker
- finite state
- planning domains
- formal verification
- computation tree logic
- formal specification
- reachability analysis
- automated verification
- symbolic model checking
- verification method
- process algebra
- timed automata
- partial order reduction
- concurrent systems
- formal methods
- pspace complete
- transition systems
- linear temporal logic
- ai planning
- asynchronous circuits
- knowledge representation
- logic programming