Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms.
Qinghang ZhaoWenyu SunJiaqing ZhaoJian ZhaoHailong YaoTsung-Yi HoXiaojun GuoHuazhong YangYongpan LiuPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2019)