A 28nm 15.59µJ/Token Full-Digital Bitline-Transpose CIM-Based Sparse Transformer Accelerator with Pipeline/Parallel Reconfigurable Modes.
Fengbin TuZihan WuYiqi WangLing LiangLiu LiuYufei DingLeibo LiuShaojun WeiYuan XieShouyi YinPublished in: ISSCC (2022)
Keyphrases
- parallel implementation
- compute intensive
- parallel architecture
- field programmable gate array
- coarse grain
- sparse data
- low cost
- high dimensional
- hardware implementation
- parallel processing
- fuzzy logic
- parallel computation
- shared memory
- computer architecture
- fine grain
- message passing interface
- pipeline architecture
- compressive sensing
- general purpose
- parallel algorithm
- fault diagnosis
- artificial intelligence