Live Demonstration: FPGA-Based CNN Accelerator with Filter-Wise-Optimized Bit Precision.
Kengo NakataAsuka MakiDaisuke MiyashitaFumihiko TachibanaTomoya SuzukiJun DeguchiPublished in: ISCAS (2019)
Keyphrases
- field programmable gate array
- cellular neural networks
- high precision
- pairwise
- real time
- noise reduction
- precision and recall
- preprocessing step
- application specific
- parallel implementation
- high recall
- hardware implementation
- average precision
- video processing
- noise removal
- convolutional neural network
- filtering algorithm
- median filter
- embedded systems
- general purpose
- digital images
- feature vectors
- image sequences
- image processing
- data sets