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A Burst-Mode TIA with Automatic Power Saving and DC Wander Reduction in 65-nm CMOS.
Toshiyuki Inoue
Akira Tsuchiya
Keiji Kishine
Daisuke Ito
Yasuhiro Takahashi
Makoto Nakamura
Published in:
ICECS 2022 (2022)
Keyphrases
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power saving
power consumption
power reduction
low power
nm technology
cmos technology
energy efficiency
energy saving
wireless communication
multi threaded
low cost
data center
power dissipation
highly efficient
computer simulation
genetic programming
high speed