Design of Low Power Track and Hold Circuit Based on Two Stage Structure.
Takahide SatoIsamu MatsumotoShigetaka TakagiNobuo FujiiPublished in: IEICE Trans. Electron. (2008)
Keyphrases
- low power
- logic circuits
- high speed
- cmos technology
- power consumption
- single chip
- power dissipation
- gate array
- low power consumption
- power reduction
- low cost
- vlsi architecture
- vlsi circuits
- digital signal processing
- mixed signal
- delay insensitive
- nm technology
- circuit design
- design process
- real time
- wireless transmission
- digital circuits
- design methodology
- digital camera
- ultra low power