Exploiting regularity for low-power design.

Renu Mehra Jan M. Rabaey

Published in: ICCAD (1996)

Keyphrases

low power
single chip
low power consumption
power consumption
vlsi architecture
low cost
gate array
logic circuits
high speed
mixed signal
digital signal processing
real time
cmos technology
power dissipation
power reduction
wireless transmission
nm technology
high power
multi channel
design process
ultra low power