Extending RISC-V Processor Datapaths with Multi-Grain Reconfigurable Overlays.

Daniel Vázquez Alfonso Rodríguez Andrés Otero Eduardo de la Torre

Published in: DCIS (2022)

Keyphrases

instruction set
computation intensive
digital signal
systolic array
application specific
low cost
high speed
parallel processing
parallel architecture
general purpose
hardware implementation
functional units
scalable distributed
data sets