Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations.
Bing LiNing ChenUlf SchlichtmannPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2012)
Keyphrases
- power reduction
- graph structure
- statistical models
- graph representation
- graph theory
- directed graph
- high speed
- stable set
- connected components
- statistical analysis
- random walk
- data driven
- bipartite graph
- power consumption
- weighted graph
- graph theoretic
- data sets
- statistical methods
- graph matching
- low power
- graph databases
- statistical information
- random graphs
- circuit design