Design of Low Power with Expanded Noise Margin Subthreshold 12T SRAM Cell for Ultra-Low Power Devices.
Harekrishna KumarV. K. TomarPublished in: J. Circuits Syst. Comput. (2021)
Keyphrases
- low power
- ultra low power
- low power consumption
- power consumption
- single chip
- low cost
- high speed
- vlsi architecture
- logic circuits
- digital signal processing
- cmos technology
- high power
- mixed signal
- gate array
- power reduction
- power dissipation
- wireless transmission
- embedded systems
- vlsi circuits
- image sensor
- energy dissipation
- real time