A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering.
Woo-Chan ParkDuk-Ki YoonKil-Whan LeeIl-San KimKyung-Su KimWon-Jong LeeTack-Don HanSung-Bong YangPublished in: ARCS (2006)
Keyphrases
- processing elements
- level parallelism
- multi processor
- memory management
- parallel architecture
- single instruction multiple data
- multi core processors
- parallel processing
- multithreading
- distributed memory
- high quality
- memory subsystem
- real time
- single processor
- memory hierarchy
- random access
- massively parallel
- computer architecture
- parallel processors
- distributed processing
- master slave
- computer graphics
- parallel implementation
- single chip
- ibm zenterprise
- computation intensive
- parallel hardware
- management system
- multiprocessor systems
- instruction set
- computing power
- high fidelity
- shared memory
- associative memory