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An ultra-low-voltage LC-VCO with a frequency extension circuit for future 0.5-V clock generation.
Wei Deng
Kenichi Okada
Akira Matsuzawa
Published in:
ASP-DAC (2011)
Keyphrases
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low voltage
high speed
cmos technology
power consumption
design considerations
power management
power line
low power
duty cycle
real time
digital images