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Operand-Load-Based Split Pipeline Architecture for High Clock Rate and Commensurable IPC.

Rama SangireddyJatan P. Shah
Published in: IEEE Trans. Parallel Distributed Syst. (2008)
Keyphrases
  • pipeline architecture
  • wide range
  • power consumption
  • hardware implementation
  • high speed
  • load balancing
  • high efficiency
  • high rate
  • real world
  • machine learning
  • case study
  • video sequences
  • signal processing
  • true positive