A low-cost, fault-tolerant and high-performance router architecture for on-chip networks.
Mojtaba ValinatajMostafa ShahiriPublished in: Microprocess. Microsystems (2016)
Keyphrases
- fault tolerant
- low cost
- network on chip
- interconnection networks
- fault tolerance
- low power consumption
- packet switching
- low power
- signal processor
- distributed systems
- reconfigurable hardware
- single chip
- evolvable hardware
- state machine
- real time
- high availability
- load balancing
- high bandwidth
- vlsi implementation
- local area network
- safety critical
- cmos technology
- embedded systems
- network structure
- fault isolation
- high assurance
- metadata