TriZone: A Design of MLC STT-RAM Cache for Combined Performance, Energy, and Reliability Optimizations.
Zihao LiuMengjie MaoTao LiuXue WangWujie WenYiran ChenHai LiDanghui WangYukui PeiNing GePublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)