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4×12 Gb/s 0.96 pJ/b/lane analog-IIR crosstalk cancellation and signal reutilization receiver for single-ended I/Os in 65 nm CMOS.

Taehyoun OhRamesh Harjani
Published in: VLSIC (2012)
Keyphrases
  • analog vlsi
  • high speed
  • signal processing
  • circuit design
  • digital filters
  • frequency domain
  • traffic flow
  • low cost
  • received signal
  • focal plane
  • cmos image sensor